José F. Martínez

Professor

Selected Publications

Author key: Cornell, Student

GOMACTech, March 2018 [PDF]

K. Skadron, Y. Xie, J.F. Martínez, S. Swanson, and J. Patel
CRISP: Center for Research in Intelligent Storage and Processing in Memory
In Government Microcircuit, Applications, and Critical Technology Conf. (GOMACTech), Miami, FL, March 2018

IISWC, Oct. 2017 [PDF]

S. Chen, S. GalOn, C. Delimitrou, S. Manne, and J.F. Martínez
Workload characterization of interactive cloud services on big and small server platforms
In IEEE Intl. Symp. on Workload Characterization (IISWC) Seattle, WA, Oct. 2017

HPCA, Feb. 2017 [PDF]

X. Wang, S. Chen, J. Setter and J.F. Martínez
SWAP: Effective fine-grain management of shared last-level caches with minimum hardware support
In Intl. Symp. on High Performance Computer Architecture (HPCA), Austin, TX, Feb. 2017

ASPLOS, Apr. 2016 [PDF]

X. Wang and J.F. Martínez
ReBudget: Trading off efficiency vs. fairness in market-based multicore resource allocation via runtime budget reassignment
In Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Atlanta, GA, Apr. 2016

HPCA, Mar. 2016 – Program Chair

Proceedings of the 22nd Intl. Symp. on High-Performance Computer Architecture, Barcelona, Spain, Mar. 2016

FPL, Sep. 2015 [PDF]

S. Hurkat, J. Choi, E. Nurvitadhi, J.F. Martínez, and R. Rutenbar
A fast hierarchical implementation of sequential tree-reweighted belief propagation for probabilistic inference
In Intl. Conf. on Field-Programmable Logic (FPL), London, England, Sep. 2015

HPCA, Feb. 2015 [PDF] – Best Paper Nomination

X. Wang and J.F. Martínez
XChange: A market-based approach to scalable dynamic multi-resource allocation in multicore architectures
In Intl. Symp. on High Performance Computer Architecture (HPCA), San Francisco, CA, Feb. 2015

FCCM, May 2014 [PDF]

E. Nurvitadhi, G. Weisz, Y. Wang, S. Hurkat, M. Nguyen, J.C. Hoe, J.F. Martínez, and C. Guestrin
GraphGen: An FPGA framework for vertex-centric graph computation
In Intl. Conf. on Field-Programmable Custom Computing Machines (FCCM), Boston, MA, May 2014

ISCA, June 2013 [PDF]

S. Ghose, H. Lee, and J.F. Martínez
Improving memory scheduling via processor-side load criticality information.
In Intl. Symp. on Computer Architecture (ISCA), Tel Aviv, Israel, June 2013

ISCA, June 2013 [PDF]

J. Mukundan, H. Hunter, K.-H. Kim, J. Stuecheli, and J.F. Martínez
Understanding and mitigating refresh overheads in high-density DDR4 DRAM systems.
In Intl. Symp. on Computer Architecture (ISCA), Tel Aviv, Israel, June 2013

ICS, June 2012 [PDF]

J. Mukundan, S. Ghose, R. Karmazin, E. İpek, and J.F. Martínez
Overcoming single-thread performance hurdles in the Core Fusion reconfigurable multicore architecture
In Intl. Symp. on Supercomputing (ICS), Venice, Italy, June 2012

HPCA, Feb. 2012 [PDF]

J. Mukundan and J.F. Martínez
MORSE: Multi-objective reconfigurable self-optimizing memory scheduler
In Intl. Symp. on High-Performance Computer Architecture, New Orleans, LA, Feb. 2012

ASPLOS, Mar. 2010 [PDF]

N. Kırman and J.F. Martínez
An efficient all-optical on-chip interconnect based on oblivious routing
In Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, Pittsburgh, PA, Mar. 2010

MICRO, Dec. 2009 – Program Co-chair

Proceedings of the 42nd Intl. Symp. on Microarchitecture, New York, NY, Dec. 2009

IEEE Micro, Sep.-Oct. 2009 [PDF]

J.F. Martínez and E. İpek
Dynamic multicore resource management: A machine learning approach
In IEEE Micro, Vol. 29, No. 5, Sep.-Oct. 2009

MICRO, Nov. 2008 [PDF]

R. Bitirgen, E. İpek, and J.F. Martínez
Coordinated management of multiple resources in chip multiprocessors: A machine learning approach
In Intl. Symp. on Microarchitecture, Lake Como, Italy, Nov. 2008

ISCA, June 2008 [PDF]

E. İpek, O. Mutlu, J.F. Martínez, and R. Caruana
Self-optimizing memory controllers: A reinforcement learning approach
In Intl. Symp. on Computer Architecture, Beijing, China, June 2008

MICRO, Dec. 2007 [PDF]

A. Basu, N. Kırman, M. Kırman, M. Chaudhuri, and J.F. Martínez
Scavenger: A new last level cache architecture with global block priority
In Intl. Symp. on Microarchitecture, Chicago, IL, Dec. 2007

DSN, June 2007 [PDF]

C.C. LaFrieda, E. İpek, J.F. Martínez, and R. Manohar
Utilizing dynamically coupled cores to form a resilient chip multiprocessor
In Intl. Conf. on Dependable Systems and Networks, Edinburgh, Scotland, June 2007

ISCA, June 2007 [PDF]

E. İpek, M. Kırman, N. Kırman, and J.F. Martínez
Core Fusion: Accommodating software diversity in chip multiprocessors
In Intl. Symp. on Computer Architecture, San Diego, CA, June 2007

IEEE Micro, Jan.-Feb. 2007 [PDF] – Top Picks

N. Kırman, M. Kırman, R.K. Dokania, J.F. Martínez, A.B. Apsel, M.A. Watkins, and D.H. Albonesi
Leveraging optical technology in bus-based multicore design
In IEEE Micro Top Picks from Computer Architecture Conferences, Jan.-Feb. 2007

MICRO, Dec. 2006 [PDF] – Best Paper Nomination

N. Kırman, M. Kırman, R.K. Dokania, J.F. Martínez, A.B. Apsel, M.A. Watkins, and D.H. Albonesi
Leveraging optical technology in future bus-based chip multiprocessors
In Intl. Symp. on Microarchitecture, Orlando, FL, Dec. 2006

HPCA, Feb. 2006 [PDF]

J. Li and J.F. Martínez
Dynamic power-performance adaptation of parallel computation on chip multiprocessors
In Intl. Symp. on High-Performance Computer Architecture, Austin, TX, Feb. 2006

ACM TACO, Dec. 2005 [PDF]

J. Li and J.F. Martínez
Power-performance considerations of parallel computing on chip multiprocessors
In ACM Trans. on Architecture and Code Optimization, Vol. 2, No. 4, Dec. 2005

MICRO, Nov. 2005 [PDF]

M. Kırman, N. Kırman, and J.F. Martínez
Cherry-MP: Correctly integrating checkpointed early resource recycling in chip multiprocessors
In Intl. Symp. on Microarchitecture, Barcelona, Spain, Dec. 2005

ISPASS, March 2005 [PDF]

J. Li and J.F. Martínez
Power-performance implications of thread-level parallelism in chip multiprocessors
In Intl. Symp. on Performance Analysis of Systems and Software, Austin, TX, Mar. 2005

HPCA, Feb. 2005 [PDF] – Best Paper Award

N. Kırman, M. Kırman, M. Chaudhuri, and J.F. Martínez
Checkpointed early load retirement
In Intl. Symp. on High-Performance Computer Architecture, San Francisco, CA, Feb. 2005

ACM TACO, Dec. 2004 [PDF]

A. Cristal, O. Santana, M. Valero, and J.F. Martínez
Toward kilo-instruction processors
In ACM Trans. on Architecture and Code Optimization, Vol. 1, No. 4, Dec. 2004

HPCA, Feb. 2004 [PDF]

J. Li, J.F. Martínez, and M.C. Huang
The thrifty barrier: Energy-efficient synchronization in shared-memory multiprocessors
In Intl. Symp. on High-Performance Computer Architecture, Madrid, Spain, Feb. 2004

IEEE Micro, Nov.-Dec. 2003 [PDF] – Top Picks

J.F. Martínez and J. Torrellas
Speculative synchronization: Programmability and performance for parallel codes
In IEEE Micro Top Picks from Microarchitecture Conferences, Nov.-Dec. 2003

IEEE Computer Architecture Letters, Oct. 2003 [PDF]

A. Cristal, J.F. Martínez, J. Llosa, and M. Valero
A case for resource-conscious out-of-order processors
In IEEE Computer Architecture Letters, Vol. 2, Oct. 2003

MICRO, Nov. 2002 [PDF]

J.F. Martínez, J. Renau, M.C. Huang, M. Prvulovic, and J. Torrellas
Cherry: Checkpointed early resource recycling in out-of-order microprocessors
In Intl. Symp. on Microarchitecture, Istanbul, Turkey, Nov. 2002

ASPLOS, Oct. 2002 [PDF]

J.F. Martínez and J. Torrellas
Speculative Synchronization: Applying Thread-Level Speculation to explicitly parallel applications
In Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, San Jose, CA, Oct. 2002

ISCA, June 2000 [PDF]

M. Cintra, J.F. Martínez, and J. Torrellas
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
In Intl. Symp. on Computer Architecture, Vancouver, Canada, June 2000

ICS, June 1999 [PDF]

J.F. Martínez, J. Torrellas, and J. Duato
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
In Intl. Conf. on Supercomputing, Rhodes, Greece, June 1999